Practical UVM Step by Step Examples
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AED 450.00
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The Universal Verification Methodology is an industry standard used by many companies for verifying ASIC devices. In this book, you will find step-by-step instructions, coding guidelines and debugging features of UVM explained clearly using examples. The book also covers the changes from UVM-1.1d to UVM 1.2 and provides details of the enhancements in the upcoming IEEE 1800.2 UVM standard: http: //www.accellera.org/community/uvm/faq The Table of Contents, Preface, Foreword from UVM committee members and detailed information on this book is available on www.uvmbook.com.
| Publisher Name | Srivatsa Vasudevan |
|---|---|
| Author Name | Hagendorf, Col |
| Format | Audio |
| Bisac Subject Major | COM |
| Language | NG |
| Isbn 10 | 0997789603 |
| Isbn 13 | 9780997789607 |
| Target Age Group | min:NA, max:NA |
| Dimensions | 01.00" H x 00.07" L x 99.00" W |
| Page Count | 432 |
Srivatsa Vasudevan is a Principal Engineer at Synopsys in Mountain View California USA. He works on cutting edge designs and has extensive verification experience. His expertise lies in Methodology, simulation performance and helping teams with complex technical challenges.
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